What will computer chips look like in 2045?
What will computer chips look like in 2045?
Podcast1 hr 9 min
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Note: AI-generated summary based on third-party content. Not financial advice. Read more.
Quick Insights
  • TSMC (TSM) is the clearest foundry opportunity to monitor: its leading-edge scale, EUV experience, and broad customer base position it to capture AI demand, though equipment shortages may limit near-term capacity growth.
  • ASML (ASML) is a key way to gain exposure to the advanced-chip equipment bottleneck; watch order growth and production capacity, while accounting for long lead times and the high cost of high-NA EUV.
  • Intel (INTC) is a higher-risk turnaround rather than a proven foundry play: track 14A’s 2028 schedule, improving yields, and external customer adoption before relying on its expansion case.
  • For AI infrastructure, monitor NVIDIA (NVDA) and SK hynix for whether access to memory, packaging, and other constrained components can keep pace with demand; the discussion gives no price targets or specific buy recommendations.
Detailed Analysis

Intel (INTC)

  • Intel is trying to expand its foundry business and meet rising AI-related demand, but it remains smaller than TSMC in manufacturing scale.
  • Intel’s CTO said the company is close to TSMC on some technology measures, but argued that on-time execution, high yields, and the ability to ramp production matter more than small differences in performance or density.
  • Intel’s planned 14A process, discussed as arriving around 2028, is being developed with high-NA EUV as an option for customers. Intel says its backside-power design makes high-NA EUV more useful for its process than it is for TSMC’s.
  • Intel is working to improve its foundry offering, including its process design kits (PDKs). The company acknowledged a learning curve in providing the documentation and tools external customers expect.
  • The transcript highlighted past execution problems: Intel’s 10-nanometer process missed its original 2016 manufacturing target and did not begin manufacturing until 2018. Intel also adopted EUV later than TSMC.
  • Intel’s CTO described substantial equipment and capacity constraints across the industry. Under current constraints, he estimated that output might be increased by about 2x, but not 10x. Intel plans to invest more, while noting that a major tool order can take around 18 months to arrive.
  • Intel’s fixed-cost structure makes utilization and yield especially important: small improvements in the share of good chips can produce a disproportionate increase in usable output.

Takeaways

  • Intel could benefit if customers seek more foundry capacity and the company executes its process roadmap successfully. The main evidence to watch is whether 14A stays on schedule, yields improve, and external customers adopt Intel’s PDKs and manufacturing services.
  • The opportunity is balanced by clearly discussed risks: Intel’s history of delays, its smaller scale, the difficulty of winning foundry customers, and limited access to specialized manufacturing equipment.
  • The transcript cited approximately $20 billion of Intel capital expenditure versus approximately $50 billion for TSMC in the period discussed. Those figures underscore the difference in current investment scale, but do not by themselves establish which company will earn better returns.

Taiwan Semiconductor Manufacturing Company (TSMC)

  • TSMC was described as having more than 3x Intel’s leading-edge wafer manufacturing scale and as being heavily loaded with AI-related demand.
  • The transcript said TSMC moved EUV into volume manufacturing in 2019 and expanded its use on its 5-nanometer process in 2020, giving it several years more experience with the technology than Intel.
  • The interviewee argued that TSMC and Intel can reach different conclusions about the same equipment because their process designs differ. In particular, TSMC’s lack of Intel-style backside power means high-NA EUV may not provide the same benefit for TSMC, which can instead use double patterning.
  • TSMC was described as having greater foundry scale and as serving many customers, which can provide more production learning and revenue to reinvest. Its scale also means that capacity constraints and high utilization are important factors.

Takeaways

  • TSMC’s scale, experience, and broad customer base are competitive strengths discussed in the episode. Investors evaluating the company can watch whether it converts AI demand into sustained utilization, yield, and capacity growth.
  • The transcript also points to a limit on growth: adding leading-edge capacity depends on scarce equipment and long build-out timelines. High demand does not automatically mean supply can expand quickly.

ASML (ASML)

  • ASML’s EUV lithography machines were identified as a major bottleneck for advanced-chip production. The transcript said ASML produces fewer than 100 EUV machines a year and does not plan to increase production significantly beyond that by the end of the decade.
  • High-NA EUV uses a wider optical aperture to print smaller features in fewer passes. That can save machine time and reduce opportunities for defects, but the machines are substantially more expensive.
  • The transcript described a high-NA machine as costing roughly twice a standard EUV machine, and later cited about $400 million for a high-NA scanner and associated equipment.
  • Chipmakers’ decisions to adopt high-NA EUV depend on whether the savings in process steps and defect risk justify the higher cost. The value differs by chipmaker and process design.

Takeaways

  • ASML is positioned at a critical point in the advanced-chip supply chain, so demand for leading-edge manufacturing could support demand for its equipment.
  • The opportunity is constrained by the company’s production capacity and the time required to scale the wider supply chain. The transcript also highlights the risk that a costly new tool may not be economical for every manufacturer or process.

NVIDIA (NVDA)

  • NVIDIA’s Blackwell data-center GPU was given as an example of a system that combines two large processor chips with eight stacks of high-bandwidth memory.
  • The discussion emphasized that AI performance can be limited not just by computing power but by how quickly data moves between processors and memory. Advanced packaging and denser connections can help address this.
  • The transcript said NVIDIA has reportedly made commitments worth hundreds of billions of dollars for memory and other components. This was presented as an example of major AI companies trying to secure supply.

Takeaways

  • The discussion supports watching both NVIDIA’s AI-chip demand and its access to memory, packaging, and other constrained components. Strong demand for accelerators does not remove the risk that suppliers cannot deliver enough parts.
  • The transcript did not provide a price target or a specific buy or sell recommendation for NVIDIA.

SK hynix

  • SK hynix was mentioned among the memory manufacturers competing for a limited supply of advanced lithography equipment as it ramps production.
  • Intel’s CTO said the supply crunch appeared larger for memory than for compute and that the world could absorb as much memory as manufacturers could produce.

Takeaways

  • The transcript presents memory availability as a potential constraint on AI infrastructure growth, making production capacity and equipment access important factors to monitor for memory suppliers.
  • It provides no company-specific earnings outlook, price target, or recommendation for SK hynix.

Samsung Electronics

  • Samsung was described as having begun producing gate-all-around chips in 2022, while Intel’s first EUV process reached products in 2023. The transcript used this to illustrate that manufacturing experience with a new process can develop over several years.
  • Samsung was also mentioned among the memory makers seeking advanced manufacturing equipment amid the industry’s supply constraints.

Takeaways

  • Samsung’s relevance in the discussion comes from both advanced-chip manufacturing and memory supply. Investors would need to assess those businesses separately; the transcript does not offer a company-wide valuation or recommendation.
  • A key issue raised is whether new manufacturing technologies can be brought into high-volume production reliably and at an economical cost.

Semiconductor and AI infrastructure

  • The episode described an unusually large demand shock from AI, with one speaker estimating demand at 40% to 50% above maximum capacity.
  • The interviewee said leading-edge manufacturing capacity cannot expand as quickly as AI demand might suggest. Equipment suppliers, their own suppliers, fab construction, power, water, and other consumables all constrain the pace of growth.
  • Semiconductor fabs have very high fixed costs. As a result, higher utilization and better yields can have a powerful effect on output and economics. The industry’s consolidation to only a few advanced-node foundries was presented as a consequence of these scale requirements.
  • The discussion also highlighted advanced packaging and hybrid bonding as ways to increase chip-to-chip connection density and reduce power per bit. These technologies can benefit AI systems and may also help reduce power use in other applications.
  • Longer-term research areas included CFET transistor stacking, ruthenium as a possible replacement for copper at very fine wiring pitches, and 3D chip structures. The speakers described these as technically challenging; heat, manufacturing complexity, and reliable interconnects remain obstacles.
  • Intel’s CTO discussed a possible TerraFab effort with Elon Musk, but the episode framed such a project as another way to secure supply rather than a guaranteed increase in total global chip output, given equipment constraints.

Takeaways

  • The clearest investment theme in the discussion is the AI semiconductor supply chain: chip designers, foundries, lithography and other equipment suppliers, memory makers, and advanced-packaging providers.
  • Demand growth is a positive, but the episode repeatedly cautions that equipment availability, fab capacity, yield, and execution determine how much demand can become actual sales.
  • Near-term investment cases are tied to production and capacity milestones. More speculative technologies such as CFET and new interconnect materials have a much longer development path and should not be treated as near-term production drivers.
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Episode Description
Demand for AI compute has grown 3x a year for the last decade, but according to Intel’s CTO, there are only enough chipmaking tools in the world to roughly double leading-edge production. I wanted to understand what innovations are coming out of the fabs, and what they mean for the future of computers, so I spent two days at Intel talking to the people working on them – from the head of process development to the research lab, the packaging group, and the CTO. A lot of what’s coming next – gate-all-around transistors, backside power, CFET, hybrid bonding – is hard to follow without seeing it, so some of this video is the animated explainer I wish I had while I was prepping. We haven’t done this format before, so let me know what you think! I also made flashcards for the concepts I had to learn to prep for this episode here. Watch on YouTube, read the transcript. Sponsors WorkOS helps you do business with enterprises. It gives you access to all the features most commonly required by enterprises: SSO, SCIM, RBAC, audit logs, and more. It’s easy to plug these features in — it only takes a few lines of code — and WorkOS is releasing new functionality all the time, including things like auth for agents. If you want to join the 3,000+ companies that rely on WorkOS, go to workos.com Jane Street built a powerful tool called magic-trace to help analyze and debug their trading systems. It only exists because one engineer noticed a feature on Intel chips called Processor Trace and thought it’d be valuable to build on top of. Now, traders and developers across Jane Street use magic-trace every single day! If you want to be trusted to pursue the ideas you think matter most, Jane Street is hiring. Go to janestreet.com/dwarkesh Antithesis’ testing platform lets you perfectly reproduce every single bug you find. That’s because it runs on a fully deterministic computer, which strips out all the unpredictability that can make certain bugs flaky and hard to pin down. To build it, Antithesis found every source of non-determinism in Intel’s x86 architecture and either sealed it off or replaced it with a controlled simulation. Learn more at antithesis.com/dwarkesh Timestamps (00:00:00) – Intro (00:00:47) – How Intel brings up a new process node (00:03:22) – What Intel learned from 10nm (00:06:28) – From planar transistors to gate-all-around (00:13:13) – Why High-NA EUV pays off for Intel but not TSMC (00:19:20) – Could chips have evolved completely differently? (00:23:33) – Inside Intel’s “Hot Topics” meeting (00:29:30) – Replacing copper wires with ruthenium (00:32:41) – Why stacked transistors take a decade to ship (00:39:45) – Hybrid bonding and the chip-to-chip bottleneck (00:48:00) – There aren’t enough tools to 10x chip production (00:53:14) – Can Intel catch up to TSMC? (01:01:02) – Terafab, and rethinking the fab from scratch This is a public episode. If you would like to discuss this with other subscribers or get access to bonus episodes, visit www.dwarkesh.com
About Dwarkesh Podcast
Dwarkesh Podcast

Dwarkesh Podcast

By Dwarkesh Patel

Deeply researched interviews <br/><br/><a href="https://www.dwarkesh.com?utm_medium=podcast">www.dwarkesh.com</a>